This invention concerns electronic repeaters for transmission of binary signals in either direction between sections of a bus-line or the like, with suitable amplification for restoring the desired waveform of signals that have become distorted during previous transmission.
Such bidirectional line repeaters typically handle transmission in the two directions by essentially distinct transmission circuits which are connected in parallel between terminals of the respective line sections. In order to avoid instability due to positive gain in the resulting loop circuit, it is usual to provide some form of electronic switching means for selectively enabling only one circuit at a time, according to the direction in which data signals are to be transmitted.
Selection of the transmission circuit to be enabled in such repeaters is ordinarily controlled by externally developed control signals, which may be produced, for example, in the same equipment units from which the data signals are received. That method of avoiding instability has the obvious disadvantages that hardware must be provided for generating suitable external control signals, and that additional control lines are required for delivering those signals to each repeater. Also, if the line repeater is used in a computer circuit, additional program instructions may be needed to control the transmission.
A primary purpose of the present invention is to provide a simple and economical amplifying repeater circuit which is self-contained with respect to stability, in the sense that no externally supplied control signals are needed for controlling the direction of transmission. Instead, the transmission capability of the repeater is controlled internally by the data signals themselves as they arrive from one or other of the bus-line sections. The problem of externally generating special control signals is thereby completely eliminated.
The patent literature known to applicant includes only one description of a bidirectional repeater that aims to use internally developed control signals for selecting the direction of transmission. U.S. Pat. No. 3,769,525 to Richard C. Foss describes such a system which includes a memory circuit "for remembering which direction data transmission has been established and for ensuring that the logic gate controlling data flow in that direction remains enabled and the logic gate controlling data flow in the opposite direction is disabled until data flow in the originally established direction ceases."
However, the repeater circuits described by Foss, as typified by his FIG. 4, have the disadvantage of requiring eight distinct gates or equivalent circuit units, including the memory circuit and its control gates. Each bus-line section is electrically loaded by one of those control gates, thereby adding to the potential generation of line noise.
Moreover, when the state of the memory circuit initially corresponds to transmission in one direction a data signal input in the other direction must cause successive signal traversals of four gate units with their cumulative time delays before it appears at the output bus-line terminal. Therefore, the delay of signal transmission is different depending upon the previous direction of signal transmission.
The present invention aims to avoid those disadvantages, and to provide circuits which are simpler and more economical than any suggested by the Foss patent. In particular, the present invention, at least in its preferred embodiments, does not require the complexity and time delay associated with use of a memory circuit.
A more particular purpose of the invention is to assure signal transmission in either direction through the amplifying repeater with minimum time delay, and in such a way that whatever time delay may be experienced is strictly uniform for successive signal pulses.
A further object of the invention is to provide a repeater circuit having optimum time discrimination between oppositely directed input signals which appear at the two input terminals nearly simultaneously. Especially in systems in which the leading edge of each signal pulse carries the data information, it is important to avoid significant delay or irregularity in selecting which of two competing signals should be transmitted.
A still further object of the invention is to avoid unnecessary electrical loading of the bus-line sections by the switching logic, which might cause noise on those lines and thus lower the effective signal to noise ratio of the overall system.
The invention further aims to provide self-contained bidirectional repeater circuits having good flexibility of design with respect to the type of logic gates required for their instrumentation, so that optimum economy and convenience of fabrication can be attained under varying system requirements.
Previously available bidirectional line repeaters of the described general type ordinarily may incorporate switching means for selectively disabling signal transmission in one or both directions in response to an external control circuit to make the repeater effectively a unidirectional or open circuit between the two line sections which it normally connects. That is true also of the repeaters of the present invention, which also may employ a novel manner of applying the disabling signal.